3LA (short for three-level architecture) is a project that aims to build reliable design and implementation flow for Deep Learning Accelerators. It composes of 3 parts: TVM, ILA (Instruction-level Abstraction) and FlexASR (Flexible Automatic Speech Recognition). We propose a way using Relay as frontend language, ILA as intermediate representation (IR) for verification purposes and the actual metal device (FlexASR for instance) as the target to demonstrate the capability of our compilation flow to verify high-level implementation of Tensor operators against hardware implementation.
